Arria 10 GX FMC PCIe board

Product overview

The Arria 10 GX FMC PCIe board provides to customers an on-the-shelves Best-In Class hardware solution, which is from one end extremely compact and optimized, and from the other end very opened to multiple applications by using the FMC High-Pin-Count interface and scalable DDR4 memory SODIMM module.

Benefits & features

Designing for high performance serial transceiver applications using series 10 ALTERA FPGAs
Arria 10 GX 660/1150 KLEs
Hardware, software design tools, IP, and pre-verified reference designs
Loopback boards, cables, and extension IOs board are available in the kit content
PCIe with 8 lanes at 8 Gb/s link rate (Gen3)
Advanced memory interface with DDR4 SODIMM memory up to 16 GB, support ECC and Non ECC
Enabling serial connectivity with QSFP+ with 4 XCVR links: 12.5 Gb/s per link*
Develop networking applications with RJ45 copper connector 10/100/1000 Base-T Ethernet (Through RGMII PHY​)
Implement Video display applications with Display output port Rev 1.2 (up to 5.4Gbit/s)
Expand I/O connector with 2 connectors in order to improve a front end of 32 high speed link.
On board programmable PLL oscillator (Si5341), highly flexible and configurable clock generator/buffer.

  • The board respect the VITA57.1 standard, you can plug FPGA Mezzanine Card (FMC) on the front end
    The FMC interface provides High Pin Count (HPC) fully populated, compliant +1.8V only (+vadj)
    160 LVCMOS (1.8V) usable as 80 LVDS (1.8V, 2.5V)
  • 4 dedicated LDVS clocks that respect the VITA57.1 pinout assignment usable as LVDSsignals or 8 LVCMOS
  • 10 XCVR (up to: 12.5 Gb/s)*

* Production Device with transceiver speed grade 4 can reach 12.5 Gb/s chip to chip links, The VITA 57.1 standard allows interfaces up to 10 Gb/s

Diagrams

Tech spec

Featured Device

  • The board is based on the Altera Arria 10 GX FPGA 10AX115N4F40I3SG  in F40 package, compliant with the 10AX066N4F40I3SG (1150kLE FBGA1517 48 SerDes 12.5Gbps, I3 Production Device)

Board programming

  • Onboard JTAG configuration circuitry to enable configuration over on board USB blaster
  • JTAG header provided to program the MAXV and access to the ARRIA 10.
  • Fast passive parallel (FPP) configuration via MAX®10 device and flash memory
  • Active Serial (AS) configuration via 128MB (1024Mb) Quad serial SPI Nor Flash
  • AS configuration for CvP support

Memories

  • DDR4 SODIMM interface (up to 16 GB, speeds up to 1200 MHz/2400 Mbps, 72 bits width support ECC and Non ECC)*
  • 128MB (1024Mb) Quad SPI Nor Flash
  • 32Kb I2C EEPROM

Communication & Interfaces

  • 1 x RJ45 copper connector 10/100/1000Base-T Ethernet (Through RGMII PHY) connected to the FPGA.
  • 1 x QSFP+ optical cage (4 XCVR: 12.5 Gb/s per link)**
  • One serial over USB Bridge High speed link (through USB Hub) on front µUSB connector
  • 1 x PCIe edge connector for Gen3 x4 (32Gb/s)
  • FMC High Pin Count (HPC) compliant 1V8 interface
  • 160 LVCMOS (1.8V) usable as 80 LVDS (1.8V, 2.5V)
  • 4 dedicated LDVS clocks that respect the VITA57.1 pinout assignment usable as LVDS signals or 8 LVCMOS
  • 10 XCVR (up to: 12.5Gb/s)*
  • Extension connector SEARAY™ Series
  • 20 LVDS (1.8V) + 1 LVDS Clock
  • 22 XCVR (up to: 12.5 Gb/s)**

Clock Circuitry

  • System clock 100 MHz (Max 10 / Arria 10)
  • 3 SMA connectors (1 main input clock + 1 output programmable clock)
  • SILICON LABS tree innovative clock generation SI5341, on board PLL solution with very low Jitter which programmable 9 output clocks 100Hz to 800MHz LVDS to FPGA clock system
  • Input 0: Differential clock from PLL_CLKOUT FPGA output
  • Input 1: Single ended clock from SMA connector
  • Input 2: Dedicated default input clock for the SI341 from on board 100 MHz oscillator.

Other resources

  • DisplayPort  Rev1.2 (up to 5.4Gbit/s)
  • MAX 10 Power supplies monitoring with its ADCs solution
  • LCD Monitoring
  • 5 x Push Button
  • 4 x DIP Switches
  • Diff Pair I/O (1 SMA pair)
  • On board UART over USB solution on Max 10 (µUSB connector).

Board Size

  • Length : 240 mm (9.45 inches)
  • Height :  111.15mm (4.38 inches) / Standard Height PCIe
  • Thickness : 1.57 mm (0.062 inches) / Standard Thickness PCIe

Power

  • 12V wall adapter or ATX / cables (US, UK, EU, JP)
  • 12V on a JACK/Edge PCIe connector
  • Voltage and Current measurement capability of 2.5V, 1.5V, and 1.2V, 1.0V supplies (I²C path to FPGA)

 

* Please contact ReFLEX sales office for SODIMM module compliancy

**Production Device with transceiver speed grade 4 can reach 12.5 Gb/s chip to chip links, The VITA 57.1 standard allows interfaces up to 10 Gb/s

Deliverables

Board content

  • Standard FMC Full Height PCIe board
  • PCIe standard bracket
  • Active Heat sink
  • Board Support Package (BSP) (upon request)
  • OpenCL HPC BSP (upon request)

Ordering Information

Board "FPGA Arria 10 GX 1150" // RXCA10X115PF40-FHP00A
Board " FPGA Arria 10 GX 660" // RXCA10X066PF40-FHP00A

OpenCL BSP HPC // RXCA10X0000F40-BSP00B

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