Design Gateway’s SATA IP core provides a link layer to implement SATA channels to Intel FPGAs. It supports SATA 3.0 (6Gbps) SSDs. It can connect to SSD/HDD without external PHY chips. The IP core includes a reference design for the REFLEX CES Alaric Arria 10 board to shorten development time.
Design Gateway’s NVMe Host Controller IPis designed to connect directly with Ultra High Speed NVMe SSDs without a CPU, OS, device driver or external DDR memory. It’s the best solution for applications which require ultra high speed performance, multi channel NVMe interfaces and compact systems. The IP core includes a reference design for the REFLEX CES Alaric Arria 10 board to shorten development time.
The MIL-STD1553 solution, developed by Nolam Embedded Systems and composed of the MIL-STD1553 IP CORE NES-IPCORE-M1553, the FMC Mezzanine module NES-FMC1553 and the FPGA-based board of REFLEX CES, Achilles Arria® 10 SoC SoM, provides a complete integrated MIL-STD1553 solution, for Aerospace and Defense applications.
The solution that implements Avionic interfaces like MIL-STD1553 on an FPGA brings a longer life cycle and more flexibility compared to dedicated avionics components.
In addition, with the architecture of the Achilles Arria® 10 board and Nolam FMCs & IP COREs, we can offer a standalone multiprotocol avionic solution (MIL-STD1553, ARINC429, ARINC825,AFDX ...).
The ALSE Aurora 64B/66B IP core is a very compact and optimized implementation of the Aurora 64B/66B protocol. Aurora 64B/66B is a lightweight and open protocol suitable for chip-to-chip, board-to-board and backplane applications using very high speed transceivers.
Compared to the 8B/10B version of the Aurora protocol, the 64B/66B flavor addresses the highest lanes speeds (when 8B/10B typically stops around 6 GBs per lane).
It also offers an effective bandwidth of up to 97%, instead of 80% for 8B/10B.
The IP therefore provides an efficient way to interconnect Intel and Xilinx FPGAs, or any other chip (ASIC, ASSP, etc …) using the Aurora 64B/66B protocol.