reflex ces has developed a reference design of a 100G Ethernet packet processing, available for the XpressGXS10-FH800G PCIe board, based on the Intel® Stratix® 10 FPGA.
This reference design is a 100G Ethernet architecture for look-up table based packet processing.
It has been designed for anti-DDoS, IP filtering and bandwidth allocation applications.
The XpressGX S10-FH800G Stratix® 10 GX board is a full-height profile PCIe Network Processing board, featuring the Intel® Stratix® 10 FPGA with support for up to 800 GB Ethernet.
The data is generated by the “Packet gen”, going through the Look-Up Table for processing, and validated by the “packet chk”.
When the data rate is slow, the inter-packet gap will be high.
The data rate increases as the inter-packet gap is reduced.
When the data rate is maximum, the inter-packet gap will be very low.
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The ref design is available upon request. Contact firstname.lastname@example.org for more infomation.