Algo-Logic Systems Launches 40Gbps TCP Endpoint on ReFLEX CES XpressGX5-LP FPGA Board
The high throughput 40G TCP Endpoint delivers an ultra-low-latency of 96.0 nanoseconds
SANTA CLARA, Calif. and PARIS, July 9, 2015 “” Algo-Logic Systems, a recognized leader in providing hardware” accelerated, deterministic, ultra-low-latency products, systems and solutions for accelerated finance, datacenter acceleration, and embedded system industries, today announced availability of their new 5th Generation 40G TCP Endpoint running on ReFLEX’s XpressGX5″LP platform. The IP”Core enables FPGA”implemented logic to directly communicate over 40 Gigabit Ethernet networks with remote hardware or software devices and includes easy to use hardware application programming interface that supports multiple real”world accelerated datacenter use cases.
Their network”tested 40G TCP Endpoint delivers ultra-low-latency of 96.0 nanoseconds at full duplex rates of 80 Gbps. This 40G TCP Endpoint IP Core solution runs on the Altera Stratix V FPGA on ReFLEX’s XpressGX5″LP full height, half”length platform with single QSFP+ ports. Designed for high-end applications, the XpressGX5″LP platform provides the performance, configurability, and ultra”low”latency required in high”performance FPGA computing systems for network packet processing and High Performance Computing applications in financial services and datacenter applications.
Each instance of the core supports up to 512 sessions of TCP traffic. However, unlike a software TCP endpoint, Algo”Logic’s FPGA TCP Endpoint enables a single session to send traffic at rates up to 40 Gbps in datacenters where round”trip latency is low. Additionally, it supports aggregate traffic flows that add to 40 Gbps for multiple sessions running over higher latency networks. The TCP Offload Engine (TOE) configurations are specifically designed for real”world datacenter acceleration and commercial deployment scenarios. The key features of the 40G TCP Endpoint include:
- Allows scaling from a single TCP session running at 40 Gbps up to 512 sessions per 40G port
- Utilizes a small logic footprint of under 5.0% ALMs in a Stratix V A7 FPGA
- Operates at full 40GE line rate (80 Gbps duplex) on platforms with dual QSFP+ links
- Provides very high throughput with small and large payloads including jumbo frames
- Delivers reliable delivery of data directly between FPGA accelerators and host machines
Algo”Logic’s 40G TCP Endpoint can be seamlessly integrated with other components of Algo”Logic’s Gateware Defined Networking® (GDN) IP”Core libraries, such as the Key Value Store (KVS) in”memory database, as well as with customer applications that perform N”Tuple packet classification and Network Functional Virtualization (NFV).
“FPGA boards offer processing capabilities to gain the efficiency and performance that datacenters need in order to improve their services,” said Eric Penain, Sales Director at ReFLEX CES. “We are really excited that our partnership with Algo8Logic Systems supplies the market with the first 40G TCP Endpoint based on our hardware platforms.”
“We are pleased to collaborate with ReFLEX to jointly launch our industry8first 40 Gbps TCP Endpoint on their leading FPGA Platform,” said Imran Khan, VP of Marketing and Business Development at Algo”Logic Systems, Inc. “Our high bandwidth TCP Endpoint on XpressGX58LP platform will enable the highest throughput coupled with network traffic acceleration and the lowest latency for enterprise datacenters.”
Algo”Logic’s world”class hardware”accelerated systems and solutions are used by datacenter operators to
increase throughput, minimize latency, and reduce both capital and operating expenses.
Price and availability
For additional information, please contact Info@algo-logic.com or visit Algo”Logic’s website at:
About ReFLEX CES
ReFLEX CES, a provider of Modified”Off”The”Shelf (MOTS) solutions and turnkey embedded systems, has added the hardware businesses of its sister companies in the PLDA Group, PLDA and Accelize. Effective January 1st 2015, FPGA”based boards and the SOM (System”on”Module) product lines have been transferred to the ReFLEX CES portfolio. The move is part of the ReFLEX CES strategy of diversification for growth and strengthens its position as an established provider of complex FPGA”based solutions.
About Algo%Logic Systems
Algo”Logic Systems, Inc., is a recognized leader and developer of fast time”to”market gateware libraries for Field Programmable Gate Array (FPGA) devices. Algo”Logic IP”Cores are used to lower latency in trading systems, increase packet throughput in datacenters, and lower power for data processing in embedded systems.