XpressVUP-LP5P

Presentation of the Virtex® Ultrascale+™ VU5P FPGA PCIe board

XpressVUP-LP5P
bottom picture of the XpressVU5P
top picture of the XpressVUP with the heatsink
XpressVUP-LP5P
bottom picture of the XpressVU5P
top picture of the XpressVUP with the heatsink

Product overview

The XpressVUP-LP5P is based on a Virtex® Ultrascale+™ VU5P FPGA. This Virtex® Ultrascale+™ VU5P FPGA PCIe board is a low-profile PCIe network processing FPGA board.
The Virtex® Ultrascale+™ VU5P FPGA provides the highest performance and integration capabilities in a 14 nm/16 nm FinFET node. As the industry’s most capable FPGA family, this device is ideal for computationally intensive applications.
The board provides 2 banks of DDR4, 2 banks of QDR2+ memories, and two QSFP28 cages for multi 10 GbE/40 GbE/100 GbE networking solutions.
The FPGA board is delivered with a PCIe standard or low-profile bracket. The Virtex® Ultrascale+™ VU5P FPGA PCIe board was specifically designed to optimize embedded applications.
This low-profile PCIe board is designed for finance, acceleration, data centers, networking, and security applications.

If additional System Logic Cells are required, check the XpressVUP-LP9P Virtex® Ultrascale+™ VU9P FPGA PCIe board.

Benefits & features

Benefits

  • PCIe Gen3 x16
  • Xilinx Virtex UltraScale+ VU5P FPGA
  • On board two DDR4 and two QDR2+ independent banks
  • Two QSFP28 optical cage for multi networking solutions
  • PCIe endpoint with 16 lanes at 8 Gb/s link rate (Gen3)
  • Fail safe configuration flash sector
  • Tandem configuration mode available
  • JTAG connector

Features

  • "Turbo" version                  :      VU5P speed grade -2; 2 bank DDR4 by 72bit of 8GBytes total @2666MT/s; 2 banks QDR2+Xtrem by 18bit of 72Mbit each @633Mhz

 

The XpressVUP-LP5P Virtex® Ultrascale+™ VU5P FPGA PCIe board is a low-profile FPGA board, compliant with RoHS/REACH, ISO 9001 and UL standards.

The board is based on the Xilinx® Virtex® Ultrascale+™ VU5P semiconductor FPGA. The device is ideal for computationally intensive applications.
FPGAs (field programmable gate arrays) are used to offer high-capacity logic and memory storage.

Our Virtex® Ultrascale+™ VU5P FPGA PCIe board provides primary interfaces, such as DDR4 and QDR2+ memories, PCB and circuitry, 100 GB ethernet, PCIe bus, clock, JTAG connector, transceivers, power supply, power connector, and more (see Specifications tab).

The Peripheral Component Interconnect Express, commonly known as PCI Express, is a high-speed serial computer expansion bus standard. Our FPGA board offers a PCIe x16 slot. Added to a Xilinx® Virtex® Ultrascale+™ VU5P FPGA, this makes our board quick and efficient.
The form factor of the Virtex® Ultrascale+™ VU5P FPGA PCI-Express card is low-profile.

We draw on our firmware HDL, hardware and embedded software skills to program the FPGA board to fit into embedded systems.
With its perfectly suited Virtex® Ultrascale+™ VU5P FPGA design, this evaluation board offers rapid prototyping for a quick time to market.
The board is delivered with a custom passive heatsink, and can be integrated into a chassis.
We provide online technical support for debugging or issues. Schematics, development tools, datasheets, and certifications may be available on request.

Our Virtex® Ultrascale+™ VU5P FPGA development board is specially designed for customer needs and specifications.
Our sales team is available to advise you on the best solution according to your needs, at sales@reflexces.com.

Diagrams

Block diagram of the Virtex® Ultrascale+™ VU5P FPGA PCIe board:

Tech specs

FPGA and Configuration Modules

  • Xilinx Virtex UltraScale+ 16nm FPGA
  • XCVU5P-L2FLVB2104E (Production)
  • 1,26 M System Logic Cells
  • 132 Mb UltraRAM (high-density, dual-port, synchronous memory block available in UltraScale+)
  • JTAG connector for external Xilinx USB cable
  • 2x Nor Flash for dual quad SPI (x8) configuration mode

Communication Interfaces

  • PCI Express x16 (Gen 1, 2 or 3)
  • 2 x QSFP28 quad optical cage (2 x 4 XCVR : 28 Gb/s per link)
  • 10 GbE/25GbE/50GbE/100GbE/2 x 100GbE networking interface
  • Other protocols supported by the QSFP28 modules

Memory

  • On board DDR4, 2x banks by 64 bits + 8 bits ECC, total 8GB
  • On board QDR-II+, 2x banks by 18 bits, total 144Mbits

Operating Range : 10°C to 45°C

Power

  • Max 100W
  • Delivered with a passive custom heatsink

Other resources

  • On board programmable PLL oscillator (Si5345), highly flexible and configurable clock generator.
  • On board high precision oscillator provides clock accurate 20MHz-0.05ppm for Precision Time Protocol (PTP) Ethernet, synchronisation protocol standardized IEEE 1588
  • One coax connector for PPS (pulse per second) that allows a synchronisation of multiple electronics parts

Board Dimensions

  • Length : 167.7mm (6.59inches)
  • Height : 68.9mm (2.71 inches) / Low Profile PCIe
  • Thickness : 1.57 mm (0.062 inches) / Standard Thickness PCIe

Standards and compliance

  • RoHS/REACH compliant
  • UL certified
  • ISO9001 Facility

Videos

Deliverables

Board content

  • Low-profile (half-height) form factor PCIe Board
  • PCIe standard or low profile bracket
  • XpressVUP Board Support Package
  • JTAG adapter board for external USB Xilinx Cable
  • Mechanical files (3D DWF/STEP models and 2D drawing) (upon request)

Ordering information

"Turbo version"                               //       XpressVUP-LP5PT

ECCN

ECCN Number : 4A994i

CECC (commodity Export Classification Certificate) : Download certificate

CAPI 2.0 SUPPORT

The XpressVUP is CAPI 2.0 capable on the POWER9 CPU host processors(IBM) and also supports the IBM SNAP framework.

With little FPGA knowledge, the SNAP framework allows application engineers to quickly create FPGA-based acceleration programs in a server environment.

It uses the  IBM CAPI 2.0 Interface which works on standard PCIe physical lanes, but with the benefits of lower latency and coherent memory sharing between CPU and FPGA.

With limited engineering efforts, the XpressVUP board, in combination with CAPI2.0 SNAP, gives our customers the opportunity to significantly increase the performance of applications like storage, Network and  analytics programming.

 

Note :
CAPI 2.0 stands for Coherence Accelerator Processor Interface
SNAP stands for Storage, Network, and Analytics Programming

 

BLOCK DIAGRAMS :

 

The CAPI - SNAP concept

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