BRNOLOGIC proposes a complete SmartNIC software solution, based on the Agilex™ 400G FPGA board by reflex ces

PARIS— BRNOLOGIC, a leading European-based custom designer for FPGA-based projects , and reflex ces, a leading European-based provider of custom embedded systems and High-End FPGA COTS boards, have developed a complete SmartNIC software solution based on the XpressSX AGI-FH400G Agilex™ board.

This solution, known as DYNANIC, has been fully validated and is now available for the XpressSX AGI-FH400G board.


A SmartNIC (Smart Network Interface Card) is a specialized network adapter designed to offload specific processing tasks from the host CPU to the NIC itself. This includes packet filtering, encryption/decryption, compression, and other functions traditionally handled by host software. By leveraging a SmartNIC, the load on the host CPU is reduced, resulting in improved network performance and overall efficiency.


FPGA-based SmartNICs take network acceleration to the next level by utilizing Field-Programmable Gate Arrays. These FPGAs provide flexibility for executing various tasks and allow for easy updates or modifications to the SmartNIC’s functionality.


DYNANIC provides a comprehensive package, encompassing all essential software and FPGA firmware components necessary to construct FPGA-based SmartNICs. Boasting cutting-edge technology, DYNANIC eliminates the complexities of FPGA programming, offering a standardized DPDK interface that facilitates easy utilization and swift development of customized applications.

Programming FPGA is not an easy task. DYNANIC comes with the universal high-speed FPGA packet processing pipeline for XpressSX AGI-FH400G. This pipeline consists of components required for various packet processing in many use-cases. This is the perfect solution for customers who do not want to deal with FPGA development


DYNANIC unique features:

  • No need for RTL or HLS or P4 coding
  • Great configurability (protocols, filtering options, memories)
  • Standardized software interface
  • Really high throughput
  • Many options for different link speeds from 100G to 400G


Agilex 400g PCIe board fpga packet processing pipeline


This wire-speed capable FPGA pipeline is controlled from the host software by standardized and open-source RTE Flow DPDK API. For example, to set up the filtration rule in the pipeline, it is only needed to write a few lines of code in C++ or Python programming language.


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About reflex ces

Recognized for its expertise in high-speed applications, analog and hardened systems, reflex ces has become a leading partner with major industrial companies.

reflex ces simplifies the adoption of FPGA technology with its leadingedge FPGA-based custom embedded and complex systems. reflex ces FPGA network platforms enable better flexibility and ease of programming, offering a faster and most powerful board, and reducing the customers’ technology risks and time to market.

For more information, visit

reflex ces
Eric PENAIN, Chief Business Officer



BrnoLogic offers custom design and development services for FPGA-based projects. For more than 20 years are company team members specializing in the acceleration of algorithms required for high-speed network packet processing (e.g. packet parsing, packet/headers fields extraction, hash based pattern matching, filtering, traffic flow management, etc.) with link speeds up to 400 Gbps. Unique portfolio of IPs was also utilized to bring FPGA technology closer to any software company. That’s how DYNANIC solution was created.

For more information, visit

Pavol Korček, CEO

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